Method for recovering an on-state forward voltage and, shrinking stacking faults in bipolar semiconductor devices, and the bipolar semiconductor devices

ABSTRACT

In a bipolar semiconductor device such that electrons and holes are recombined in a silicon carbide epitaxial film grown from the surface of a silicon carbide single crystal substrate at the time of on-state forward bias operation; an on-state forward voltage increased in a silicon carbide bipolar semiconductor device is recovered by shrinking the stacking fault area enlarged by on-state forward bias operation. In a method of this invention, the bipolar semiconductor device in which the stacking fault area enlarged and the on-state forward voltage has been increased by on-state forward bias operation, is heated at a temperature of higher than 350° C.

FIELD OF THE INVENTION

The present invention relates to a method for recovering an on-stateforward voltage increased by on-state forward bias operation in abipolar semiconductor device such that electrons and holes arerecombined at the time of on-state forward bias operation in a siliconcarbide epitaxial film grown on the surface of a silicon carbide singlecrystal substrate, a method for shrinking stacking faults which area hasbeen enlarged by on-state forward bias operation, and a bipolarsemiconductor device equipped with elements suitable for these methods.

BACKGROUND OF THE INVENTION

Silicon carbide (SiC) is a semiconductor having a dielectric breakdownfield intensity about ten times as much as that of silicon (Si), andfurther having excellent physical values on thermal conductivity,electron mobility and band gap. Accordingly, silicon carbide has beenexpected as a semiconductor material capable of improving capability ofsemiconductor elements greatly as compared with conventional Si powersemiconductor elements.

Recently, 4H-SiC and 6H-SiC single crystal substrates having a diameterup to 3 inches are on sale, and various kinds of semiconductor switchingelements having capabilities remarkably higher than the limit of the Sicapability have been reported one after another and the development ofhigh capability SiC semiconductor elements has been progressed.

Semiconductor elements are roughly classified into unipolarsemiconductor elements such that only electrons or holes act on electricconduction at the time of on-state forward bias operation, and bipolarsemiconductor elements such that both of electrons and holes act onelectric conduction at the time of on-state forward bias operation. Theunipolar semiconductor elements include schottky barrier diode (SBO),junction field-effect transistor (J-FET), metal/oxide film/semiconductorelectric field effect transistor (MOS-FET) and the like. The bipolarsemiconductor elements include pn diode, bipolar junction transistor(BJT), thyristor, GTO thyristor, insulated gate bipolar transistor(IGBT) and the like.

When a power semiconductor element is produced using SiC single crystal,a single crystal film having a predetermined film thickness and apredetermined doping concentration is epitaxially grown on a SiC bulksingle crystal substrate in the crystal polytype same as the substratepolytype in many cases, because the SiC single crystal has a very smalldiffusion coefficient and thereby is hardly possible to diffuseimpurities deeply (Patent Document 1). Specifically, used is a SiCsingle crystal substrate, which is prepared by slicing a bulk singlecrystal obtained with a sublimation method or a chemical vapordeposition method (CVD) and has an epitaxial single crystal film grownwith the CVD method on the surface of the substrate.

Examples of SiC single crystals may include various poly type ones(polymorphism type ones). 4H-SiC having high dielectric breakdown fieldintensity and mobility, and having relatively low anisotropy is usedmainly. Examples of the crystal surface on which epitaxial growth iscarried out may include (0001)Si surface, (000-1)C surface, (11-20)surface, (01-10) surface and (03-38) surface. When epitaxial growth iscarried out on (0001)Si surface and (000-1)C surface, the crystalsurface inclined at a several degree to the [11-20] direction or [01-10]direction is used in many cases.

-   Patent Document 1: Pamphlet of International Publication WO03/038876-   Non-Patent Document 1: Journal of Applied Physics Vol. 95 No. 3 2004    pp. 1485 to 1488-   Non-Patent Document 2: Journal of Applied Physics Vol. 92 No. 8 2004    pp. 4699 to 4704-   Non-Patent Document 3: Journal of Crystal Growth Vol. 262 2004 pp.    130 to 138

As described above, power semiconductor elements prepared using SiC haveexcellent various properties, but have the following problems. In a SiCsingle crystal of a SiC bipolar semiconductor element, various crystaldefects occur during the production process thereof. Specifically, inthe first place, in the process of growing a SiC bulk single crystal byan improved Lely method or the CVD method, various crystal defectsoccur. In a SiC bipolar semiconductor element prepared using a wafer cutfrom a SiC bulk single crystal containing such various defects, thecrystal defects present in the wafer cause lowering of the properties ofthe element.

In the second place, in the process of growing a SiC epitaxial film onthe surface of a SiC bulk single crystal substrate by the CVD method,various crystal defects are generated in the SiC epitaxial film. Oneexample of the crystal defects is basal plane dislocation.

FIG. 1 is a section showing an interfacial neighborhood between a SiCsingle crystal substrate and an epitaxial film grown on the surface ofthe substrate by a step flow growth technique. In FIG. 1, 5 is a crystalsurface ((0001)Si surface), and θ is an off angle. As shown in thefigure, many basal plane dislocations 3 which are one of crystal defectsare present on the SiC single crystal substrate 1. For example, on a SiCsingle crystal substrate inclined at an off angle of 8° from the (0001)Si surface, the density of the basal plane dislocation on the substratesurface, which depends on the crystal quality, is typically from 10² to10⁴/cm².

The basal plane dislocations 3 extended parallel to the (0001)Si surfaceemerge to the surface from the SiC single crystal substrate 1, and thenabout several % of the basal plane dislocations 3 propagate into an ntype epitaxial film 2 a and a p type epitaxial film (or a p typeimplanted layer) 2 b as they are at the time of epitaxial growth, andthe residual basal plane dislocations 3 are converted to threading edgedislocations 4 and then propagate into the n type epitaxial film 2 a andthe p type epitaxial film (or p type implanted layer) 2 b.

In a bipolar element such as pn diode or the like, the n type epitaxialfilm, and the interfacial neighborhood between the n type epitaxial filmand the p type epitaxial film, or the interfacial neighborhood betweenthe n type epitaxial film and the p type injection film become a regionwhere electrons and holes are recombined at the time of on-state forwardbias operation, but the basal plane dislocations 3 are converted intostacking faults by recombination energy of electrons and holes generatedat the time of on-state forward bias operation (referred to thenon-patent documents 1 to 3). The stacking faults occur as plane-likedefects 31 having a triangle shape or the like, as shown in FIG. 4.

The basal plane dislocations have ⅓[10-20] Burgers vectors, but arepresent in a state of being divided into two Shockley partialdislocations of ⅓[10-10] and ⅓[01-10] (sometimes referred to Shockleytype imperfect partial dislocations). Narrow regions, which areinterspaces between these partial dislocations, form stacking faults.These stacking faults are called as Shockley type stacking faults. It isconsidered that one of the partial dislocations is moved byrecombination energy of electrons and holes, and thereby the stackingfault area is enlarged.

Since the region of the stacking faults acts as a high resistant regionat the time of on-state forward bias operation, the on-state forwardvoltage of the bipolar element is increased with the enlargement of thearea of the stacking faults.

In the process for growing a SiC epitaxial film from the surface of aSiC single crystal substrate by the CVD method, various crystal defectsare generated except for the basal plane dislocations. Specifically,crystal faults, for example, point defects, edge dislocations, screwdislocations and line defects with mixed component, loop-shape defectsthereof occur in the SiC single crystal epitaxial film. Furthermore, itis considered that after forming the film by the CVD method, a strainwill occur in the crystal at the time of decreasing the temperature, andcrystal defects as described above will be generated at this time. It isfurther considered that particularly, many crystal defects as describedabove are present on the surface layer of the SiC epitaxial film.

As described above, since the inside of the SiC epitaxial film becomes aregion where electrons and holes are recombined at the time of on-stateforward bias operation, it is also considered that the above crystaldefects will be converted into plane-like stacking faults byrecombination energy of electrons and holes generated at the time ofon-state forward bias operation. As described above, the stacking faultregion acts as a high resistant region at the time of on-state forwardbias operation, and thereby the voltage in the forward direction of thebipolar element is increased.

In the third place, after the SiC epitaxial film is formed on thesurface of the SiC bulk single crystal substrate, the SiC bipolarsemiconductor element is produced through various steps including mesastructure formation, ion implantation, oxide film formation, electrodeformation, or the like. The above crystal defects also are generated inthe step of processing the SiC single crystal substrate. For example,since the SiC bulk single crystal has a low constant of diffusingimpurity atoms and it is difficult for the SiC bulk single crystal toapply impurity doping by thermal diffusion, nitrogen ion or aluminum ionis optionally introduced into the SiC epitaxial film by ionimplantation. At the time of forming JTE in pn diode, ion implantationis also carried out for the SiC epitaxial film. It is considered that atthe time of ion implantation, impurity ions derived into the crystalinside strike the SiC single crystal to destroy the crystal structure ofthe crystal, and thereby the SiC single crystal is damaged to causeoccurrence of the above crystal defects.

As described above, various crystal defects are generated in the insideof the SiC single crystal in a step of forming the SiC single crystalsubstrate, in a step of forming the SiC epitaxial film and in asubsequent step of processing the SiC substrate. The crystal defectscause lowering of the properties of the SiC bipolar semiconductorelement prepared, and particularly, the crystal defects present in theinside of the SiC epitaxial film by on-state forward bias operationbecome plane-like stacking faults. Furthermore, the area of the stackingfaults is enlarged, to increase the voltage in the forward direction.The increase of the forward voltage lowers the reliability of SiCbipolar semiconductor element and induces increase of electric powerloss in an electric power-controlling device equipped with the SiCbipolar semiconductor element. Therefore, there is a subject such thatthe forward voltage increased is recovered by shrinking the stackingfaults enlarged by on-state forward bias operation.

The present invention is intended to solve the problems associated withthe above prior arts, and it is an object of the present invention torecover the forward voltage increased in a silicon carbide bipolarsemiconductor device by shrinking the stacking fault area enlarged byenergizing.

SUMMARY OF THE INVENTION

Stacking faults enlarged by on-state forward bias operation are reducedby heating at a temperature of higher than 350° C. Specifically,plane-like stacking faults become linear stacking faults. Based on thesefindings, the present inventors found that applying heating at atemperature of higher than 350° C. to a silicon carbide bipolarsemiconductor device in which the forward voltage is increased byon-state forward bias operation, plane-like stacking faults enlarged byon-state forward bias operation are shrunk to be linear stacking faultsbefore the on-state forward bias operation and thereby the forwardvoltage increased is recovered. Thus, the present invention has beenaccomplished.

The method for recovering a voltage in a forward direction in a bipolarsemiconductor device according to the present invention is a method forrecovering an on-state forward voltage increasing in a bipolarsemiconductor device such that electrons and holes are recombined in asilicon carbide epitaxial film grown on the surface of a silicon carbidesingle crystal substrate at the time of on-state forward bias operation,wherein the method comprises heating the bipolar semiconductor device inwhich the on-state forward voltage has been increased by on-stateforward bias operation, at a temperature of higher than 350° C.

The method for recovering an on-state forward voltage increasing in abipolar semiconductor device according to the present invention ischaracterized in that using a temperature-controlling device for heatingthe bipolar semiconductor device, the bipolar semiconductor device isheated at a temperature of higher than 350° C.

The method for recovering an on-state forward voltage increasing in abipolar semiconductor device according to the present invention ischaracterized by using the bipolar semiconductor device, which comprisesa hexagonal silicon carbide single crystal substrate such that ahexagonal silicon carbide epitaxial film is grown on the surface of thesubstrate.

The method for recovering an on-state forward voltage increasing in abipolar semiconductor device according to the present invention ischaracterized by using the bipolar semiconductor device which comprisesa 4H silicon carbide single crystal substrate such that a 4H siliconcarbide epitaxial film is grown on the surface of the substrate, a 6Hsilicon carbide single crystal substrate such that a 6H silicon carbideepitaxial film is grown on the surface of the substrate, or a 2H siliconcarbide single crystal substrate such that a 2H silicon carbideepitaxial film is grown on the surface of the substrate.

The method for recovering an on-state voltage in a forward direction ina bipolar semiconductor device according to the present invention ischaracterized by using the bipolar semiconductor device, which comprisesa 15R silicon carbide single crystal substrate such that a 15R siliconcarbide epitaxial film is grown on the surface of the substrate.

The method for shrinking stacking faults in a bipolar semiconductordevice according to the present invention is a method for shrinkingstacking faults in a bipolar semiconductor device such that electronsand holes are recombined in a silicon carbide epitaxial film grown fromthe surface of a silicon carbide single crystal substrate at the time ofon-state forward bias operation, which method comprises heating thebipolar semiconductor device in which the area of stacking faults in thesilicon carbide epitaxial film has been enlarged by on-state forwardbias operation, at a temperature of higher than 350° C.

The method for shrinking stacking faults in a bipolar semiconductordevice according to the present invention is characterized in that usinga temperature-controlling device for heating the bipolar semiconductordevice, the bipolar semiconductor device is heated at a temperature ofhigher than 350° C.

The method for shrinking stacking faults in a bipolar semiconductordevice according to the present invention is characterized by using thebipolar semiconductor device, which comprises a hexagonal siliconcarbide single crystal substrate such that a hexagonal silicon carbideepitaxial film is grown on the surface of the substrate.

The method for shrinking stacking faults in a bipolar semiconductordevice according to the present invention is characterized by using thebipolar semiconductor device, which comprises a 4H silicon carbidesingle crystal substrate such that a 4H silicon carbide epitaxial filmis grown on the surface of the substrate, a 6H silicon carbide singlecrystal substrate such that a 6H silicon carbide epitaxial film is grownon the surface of the substrate, or a 2H silicon carbide single crystalsubstrate such that a 2H silicon carbide epitaxial film is grown on thesurface of the substrate.

The method for shrinking stacking faults in a bipolar semiconductordevice according to the present invention is characterized by using thebipolar semiconductor device, which comprises a 15R silicon carbidesingle crystal substrate such that a 15R silicon carbide epitaxial filmis grown on the surface of the substrate.

The bipolar semiconductor device of the present invention is a bipolarsemiconductor device such that electrons and holes are recombined in asilicon carbide epitaxial film grown on the surface of a silicon carbidesingle crystal substrate at the time of on-state forward bias operation,wherein

a bipolar semiconductor element, and

a temperature-detecting element for detecting the temperature of thebipolar semiconductor element in heating the bipolar semiconductorelement in a condition of stopping on-state forward bias operation at atemperature of 350° C. or higher in order to recover a voltage in theforward direction increased by on-state forward bias operation in thebipolar semiconductor element

are formed on the silicon carbide single crystal substrate.

The bipolar semiconductor device of the present invention is a bipolarsemiconductor device such that electrons and holes are recombined in asilicon carbide epitaxial film grown on the surface of a silicon carbidesingle crystal substrate at the time of on-state forward bias operation,wherein

a bipolar semiconductor element,

a heater for heating the bipolar semiconductor element at a temperatureof 350° C. or higher in a condition of stopping energizing in order torecover a forward voltage increased by on-state forward bias operationin the bipolar semiconductor element, and

a temperature-detecting element for detecting the temperature of thebipolar semiconductor element in heating the bipolar semiconductorelement by the heater

are formed on the silicon carbide single crystal substrate.

The bipolar semiconductor device of the present invention is a bipolarsemiconductor device such that electrons and holes are recombined in asilicon carbide epitaxial film grown on the surface of a silicon carbidesingle crystal substrate at the time of on-state forward bias operation,wherein

a bipolar semiconductor element, and

a temperature-detecting element for detecting the temperature of thebipolar semiconductor element in heating the bipolar semiconductorelement in a condition of stopping on-state forward bias operation at atemperature of 350° C. or higher in order to shrink the area of stackingfaults increased by on-state forward bias operation in the bipolarsemiconductor element

are formed on the silicon carbide single crystal substrate.

The bipolar semiconductor device of the present invention is a bipolarsemiconductor device such that electrons and holes are recombined in asilicon carbide epitaxial film grown on the surface of a silicon carbidesingle crystal substrate at the time of on-state forward bias operation,wherein

a bipolar semiconductor element,

a heater for heating the bipolar semiconductor element at a temperatureof 350° C. or higher in a condition of stopping on-state forward biasoperation in order to shrink the area of stacking faults increased byon-state forward bias operation in the bipolar semiconductor element,and

a temperature-detecting element for detecting the temperature of thebipolar semiconductor element in heating the bipolar semiconductorelement by the heater

are formed on the silicon carbide single crystal substrate.

According to the present invention, an on-state forward voltageincreased by on-state forward bias operation in a SiC bipolarsemiconductor element can be recovered to be the former condition beforethe on-state forward bias operation.

According to the present invention, the area of stacking faults enlargedby on-state forward bias operation can be shrunk.

BRIEF DESCRIPTION OF DRAWING

FIG. 1 is a section showing an interfacial neighborhood of a SiC singlecrystal substrate and an epitaxial film formed on the surface of thesubstrate by a step flow growth technique;

FIG. 2 is a section of a pn diode prepared by using a SiC single crystalsubstrate that an epitaxial film is formed on the surface thereof;

FIG. 3 is a graph showing results of on-state forward bias operationtests in examples and comparative examples, which graph shows a relationbetween a heating temperature for a pn diode and a voltage in theforward direction after an on-state forward bias operation test;

FIG. 4 are views showing results of observation for a photoluminescenceimage of a SiC epitaxial film after heating a pn diode at eachtemperature up to 600° C. after on-state forward bias operation;

FIG. 5 is a view illustrating one embodiment such that atemperature-controlling device for controlling the temperature of a SiCbipolar element is provide;

FIG. 6 is a view illustrating one embodiment such that atemperature-controlling device for controlling the temperature of a SiCbipolar element is provided; and

FIG. 7 is a view illustrating one embodiment such that atemperature-controlling device for controlling the temperature of a SiCbipolar element is provided.

BEST MODE FOR CARRYING OUT THE INVENTION

The present invention will be described with reference to the drawingsbelow.

The individual direction is represented by [ ], and the individual planeis represented by ( ) with respect to a lattice direction and a latticeplane. Although the minus index is normally represented by adding “−” ona number in the crystallography, it is represented by adding “−” beforea number in convenient for preparing the specification. Furthermore, thedescription “bipolar semiconductor element” represents a singlesemiconductor element formed on a substrate, and the description“bipolar semiconductor device” represents not only the singlesemiconductor element but also a whole element structure in which pluralelement structures are formed on a substrate, and a formation in which asubstrate formed with elements is held in a package.

In the present invention, SiC bipolar semiconductor elements, which havebeen used conventionally, are used. A SiC single crystal substrate thata SiC epitaxial single crystal film is grown from the surface thereof isused as a semiconductor substrate for forming electrodes.

A substrate prepared by slicing a bulk crystal obtainable by asublimation method or a CVD method is used as the SiC single crystalsubstrate. In the preparation with the sublimation method (modified Lelymethod), for example, powdery SiC is put into a crucible and vaporizedby heating at a temperature of from 2200 to 2400° C., to deposit on thesurface of a seed crystal at a typical rate of 0.8 to 1 mm/h, andthereby bulk growth is performed. The resulting ingot is sliced in aprescribed thickness so that a desired crystal surface appears. In orderto suppress propagation of basal plane dislocation to an epitaxial film,the surface of a wafer cut is smoothed so as to have a mirror surface bya treatment such as polishing treatment using a polishing abrasivegrain, hydrogen etching or chemical mechanical polishing (CMP).

From the surface of the SiC single crystal substrate, the SiC singlecrystal epitaxial film is grown. The kinds of SiC single crystals mayinclude crystal polymorphism type (poly type) crystals. For example,4H-SiC, 6H-SiC, 2H-SiC and 15R-SiC are used as the SiC single crystalsubstrate. Among them, 4H-SiC has high dielectric breakdown fieldintensity and mobility, and relatively low anisotropy. Examples of thecrystal surface on which epitaxial growth is carried out may include(0001)Si surface, (000-1)C surface, (11-20) surface, (01-10) surface and(03-38) surface.

In the case that epitaxial growth is carried out on the (0001)Si surfaceor (000-1)C surface, a substrate prepared by cutting a substrateinclined at an off angle of, for example, 1 to 12° toward an offdirection of [01-10] direction, [11-20] direction or the middledirection between [01-10] direction and [11-20] direction, is used, andSiC is subjected to epitaxial growth from this crystal surface by a stepflow growth technique.

The epitaxial growth of the SiC single crystal film is carried out bythe CVD method. Propane or the like is used as a source gas for C, andsilane or the like is used as a source gas for Si. A mixed gas, whichcomprises these source gases, a carrier gas such as hydrogen or thelike, and a dopant gas, is fed to the surface of the SiC single crystalsubstrate. As the dopant gas, nitrogen or the like is used in the casethat an n type epitaxial layer is grown, and trimethylaluminum or thelike is used in the case that a p type epitaxial layer is grown.

The epitaxial growth of SiC is carried out in an atmosphere of thesegases, at a temperature of from 1500 to 1600° C. under a pressure offrom 40 to 80 Torr at a growth rate of 2 to 20 μm/h. By the epitaxialgrowth, SiC having the same crystal polytype as that of the SiC singlecrystal substrate is step flow grown.

As a specific device for carrying out epitaxial growth, a vertical hotwall furnace can be used. The vertical hot wall furnace is provided witha water-cooling double cylindrical tube made of quartz, and in thewater-cooling double cylindrical tube, a cylindrical insulatingmaterial, a hot wall formed by graphite, and a wedge shaped susceptorfor keeping the SiC single crystal substrate to the longitudinaldirection are provided. On the outside circumference of thewater-cooling double cylindrical tube, an RF heating coil is provided.The hot wall is heated with high frequency induction by the RE heatingcoil and the SiC single crystal substrate kept with the wedge shapedsusceptor is heated by radiant heat conducted from the hot wall. Whilethe SiC single crystal substrate is heated, a reaction gas is fed fromthe lower part of the water-cooling double cylindrical tube and therebySiC is epitaxially grown on the surface of the SiC single crystalsubstrate.

Using the SiC single crystal substrate having the epitaxial film thusformed, a bipolar element is prepared. Hereinafter, one embodiment of amethod for producing a pn (pin) diode, which is one of bipolar elements,will be described with reference to FIG. 2. On an n type 4H-SiC singlecrystal substrate 21 (carrier density: 8×10¹⁸ cm⁻³, thickness: 400 μm)prepared by slicing an ingot grown by an modified Lely method at aprescribed off angle and subjecting the surface to mirror surfacetreatment, a nitrogen doped n type SiC layer (drift layer 23: donordensity 5×10¹⁴ cm⁻³, film thickness 40 μm) and an aluminum doped p typeSiC layer (p type junction layer 24: acceptor density 5×10¹⁷ cm⁻³, filmthickness 1.5 μm, and p+ type contact layer 25: acceptor density 1×10¹⁸cm⁻³, film thickness 0.5 μm) are epitaxially grown in this order by theCVD method.

Next, the outer periphery of the epitaxial film is removed by reactiveion etching (RIE) for forming a mesa structure. In order to form themesa structure, a Ni metal film is deposited on the epitaxial film. Forthe evaporation, an electron beam heating evaporating device is used.The electron beam heating evaporating device is equipped with anelectron ray generator, a crucible for putting a Ni metal target, and asubstrate holder in which the SiC single crystal substrate is kept sothat the surface of the epitaxial film faces toward the outside. The Nimetal piece is molten by irradiating electron beam accelerated at about10 kV to the Ni metal target put in the crucible, and deposited on theepitaxial film.

On the surface of the Ni metal film deposited on the epitaxial film, aphotoresist for patterning a mesa structure is applied in a thickness of1 μm using a spin coater and then the resist film is treated with heatin an oven. The resist film is exposed to ultraviolet rays through amask corresponding to the pattern having a mesa structure and developedusing a resist developer. The Ni metal film exposed on the substratesurface by the development is removed with an acid, and then theepitaxial film exposed on the substrate surface by removing the Ni metalfilm is etched by RIE using a mixed gas of carbon tetrafluoride andoxygen, to form a mesa having a pitch width of 4 μm.

Next, in order to relax the electric field concentration in the mesabottom, JTE (junction termination extension) 26 is formed by implantingaluminum ion. The JTE 26 has a total dose amount of 1.2×10¹³ cm⁻², awidth of 250 μm and a depth of 0.7 μm. Implanting ion with changingenergy at 30 to 450 keV successively, the implanted aluminum ion has aconcentration distribution such that the concentration in a depthdirection is constant. After the ion implanting, aluminum ion isactivated by carrying out annealing treatment in an argon gasatmosphere.

Next, an oxide film 27 for protecting the element surface is formed. Inorder to carry out heat oxidation, the substrate is put into a heatoxidation furnace and heated while feeding a dried oxygen gas, andthereby a 40 nm thick film oxidized with heat is formed over the wholesubstrate surface. Thereafter, prescribed parts for forming electrodeson the substrate surface are subjected to patterning by aphotolithography technique, and then the heat-oxidized film of theseparts is removed by a hydrofluoric acid and thereby the epitaxial filmis exposed.

In the next step, a cathode electrode 28 and an anode electrode 29 aredeposited using an electron beam heat evaporation device. The cathodeelectrode 28 is formed by evaporating Ni (350 nm thick) on the backsidesurface of the substrate 21. The anode electrode 29 is formed byevaporating a Ti film (100 nm thick) and an Al film (350 nm thick) inthis order on the upper surface of the p+ type contact layer 25. Theseelectrodes are formed into an alloy with SiC by heat treatment after thedeposition, and thereby made into an ohmic electrode.

In the present invention, the SiC bipolar semiconductor element whichhas been increased the on-state forward voltage by on-state forward biasoperation is heated at a temperature of higher than 350° C., preferably400 to 800° C., more preferably 400 to 700° C. When the temperature isover 700° C., normal operation cannot be carried out occasionallybecause the metal materials constituting the electrodes are sometimesmolten, while when it is over 800° C., the properties of the bipolarsemiconductor element are optionally affected. By heating the SiCbipolar semiconductor element which voltage in the forward direction hasbeen increased by enlargement of the area of stacking faults due toon-state forward bias operation, in the above temperature range, theenlarged area of stacking faults is shrunk and the increased forwardvoltage can be recovered to the forward voltage near the former forwardvoltage before the on-state forward bias operation. That is to say, asshown in the examples described later, the area of stacking faultsenlarged at around 350° C. is shrunk and the increased voltage in theforward direction is recovered.

It is considered this phenomenon is caused by the following reasons. Asdescribed above, in the bipolar semiconductor elements such as pn diodeor the like, an n type epitaxial film, and the interfacial neighborhoodbetween the n type epitaxial film and a p type epitaxial, or theinterfacial neighborhood between the n type epitaxial film and the ptype implantation layer make a region for recombining electrons andholes at the time of on-state forward bias operation, and thereby abasal plane dislocation propagated into the epitaxial film from the SiCsingle crystal substrate is transformed to stacking faults by thisrecombination energy. As the region on which the stacking faults areformed acts as a high resistant region at the time of on-state forwardbias operation, the voltage in the forward direction of the bipolarsemiconductor element is increased with the enlargement of the stackingfault area.

However, it is considered that since by heating under a temperaturecondition of higher than 350° C., Si atom and C atom, which will formstacking faults, are more stable in a normal lattice position ratherthan in a stacking fault state and thereby stacking faults are shrunkand as a result, the voltage in the forward direction is recovered tothe former voltage before the on-state forward bias operation. Thestacking faults can be confirmed by observing the epitaxial film as an Xray topography image, a photoluminescence image, an electroluminescenceimage or a cathode luminescence image.

Plural of pn diodes were prepared using a 4H crystal type SiC, andon-state forward bias operation for these pn diodes was carried out at acurrent density of 100 A/cm² for 60 min and thereafter heating wascarried out at each temperature of from 300° C. to 600° C. As a result,as shown in FIG. 3, in the diodes heated at a temperature lower than300° C., the recovery of the forward voltage is not confirmed. On theother hand, in the diodes heated at a temperature of 350° C., therecovery of the forward voltage is clearly confirmed, and as the heatingtemperature is more increased, the forward voltage is graduallyrecovered. In the diodes heated at a temperature higher than 400° C.,the forward voltage is largely recovered, and further, in the diodesheated at a temperature higher than 600° C., the forward voltage isrecovered to the former voltage before the on-state forward biasoperation.

As described above, heating at a temperature of higher than 350° C. forthe SiC bipolar semiconductor elements which voltage in the forwarddirection increases by on-state forward bias operation can decrease thevoltage in forward direction to the former voltage before the on-stateforward bias operation.

However, as it is considered that this phenomenon does not depend on thecrystal surface orientation on which epitaxial growth is carried out,for example, even if (0001) Si surface, (000-1) C surface, (11-20)surface, (01-10) surface and (03-38) surface are submitted to thecrystal surface orientation on which epitaxial growth is carried out,the effect same as above can be obtained. In particular, when the anglemeeting the stacking fault surface and the direction of the route ofpassing an electric current is large, for example, the stacking faultsurface vertically intercepts the route of passing an electric current,the voltage in the forward direction can be recovered largely becausethe stacking faults largely affects the on-state forward bias operationdeterioration.

The SiC single crystals include a plurality of crystal types. It isconsidered that the above phenomenon is caused by the fact that the SiCsingle crystal is stabilized under a temperature condition of higherthan 350° C. Therefore, in the case of using 4H-SiC (4-layer stackingsequenced hexagonal type) as well as 6H-SiC (6-layer sequencedhexagonal), 2H-SiC (2-layer sequenced hexagonal) or 15R-SiC (15-layersequenced rhombohedral), the voltage can be largely recovered fromdeterioration due to energizing similarly.

In bipolar semiconductor elements such that electrons and holes arerecombined in the silicon carbide epitaxial film grown on the surface ofthe silicon carbide single crystal substrate at the time of on-stateforward bias operation, even in other bipolar elements except for pndiode, the silicon carbide epitaxial film is stabilized by heating atthe above temperature and thereby the stacking faults enlarged byon-state forward bias operation can be shrunk and the voltage in theforward direction increased is recovered. Examples of the SiC bipolarsemiconductor elements may include thyristors, gate turn off thyristors(GTO thyristors), insulated gate bipolar transistors (IGBT) and bipolarjunction transistors (BJT).

The SiC bipolar semiconductor elements are used in household electricappliance, industrial electric fields, car fields such as electricvehicles, railways and the like, and electric powder fields such aspower supply and the like. For example, they are set in an electricpower-controlling device such as inverter and submitted to use. Inapplying the present invention to an SiC bipolar semiconductor elementset in an electric power-controlling device and the like actually, it ispreferable to equip a temperature-controlling device for heating the SiCbipolar semiconductor element to a prescribed temperature.

This temperature-controlling device is equipped with at least a heatingmeans for heating the SiC bipolar semiconductor element. Examples of theheating means may include a heater built in a package of a SiC bipolarsemiconductor element, and a heater formed in a SiC single crystalsubstrate prepared in a SiC bipolar semiconductor element.

The temperature-controlling device may be equipped with atemperature-detecting means for measuring a temperature of the SiCbipolar semiconductor element. Examples of the temperature-detectingmeans may include a temperature sensor built in a heater, a temperaturesensor built in a package of a SiC bipolar element, and atemperature-detecting element formed in a SiC single crystal substrateprepared in a SiC bipolar semiconductor element.

In this way, heating the SiC bipolar semiconductor element provided withthe temperature-controlling device at a temperature higher than 350° C.effectively shrink the area of stacking faults enlarged and thereby theincreased voltage in the forward direction can be recovered effectively.

The temperature-controlling device is connected with anoperation-controlling device for controlling current on-state operationin a SiC bipolar element and thereby, for example, the followingcontrols are carried out so as to carry out recovering operation of theforward voltage with heating at a prescribed time. When theoperation-controlling device detects that the voltage in the forwarddirection increases to a prescribed value, or energizing for aprescribed time is carried out, the SiC bipolar element is heated by theheater to at least a temperature of higher than 350° C. while theon-state forward bias operation is stopped and the temperature sensordetects the temperature of the element. After the area of stackingfaults enlarged by heating is shrunk and thereby the on-state forwardvoltage is recovered, on-state forward bias operation to the SiC bipolarelement is started at the former temperature by theoperation-controlling device.

FIGS. 5 to 7 show embodiments provided with the abovetemperature-controlling device. In FIG. 5, a temperature-controllingdevice 32 equipped with heaters 36 in the outside of a package andtemperature sensors 35 in the inside of the package is connected to anoperation-controlling device 31 in which energizing through electrodes34 is passed to the bipolar elements 33, and thereby when stackingfaults are enlarged by on-state forward bias operation and the voltagein the forward direction is increased, the SiC bipolar element 33 isheated by the heater 36 while the temperature sensor 35 detects thetemperature of the element.

In FIG. 6, on a SiC single crystal substrate 41 formed with an epitaxialfilm 42, both of a pn diode 43 and a temperature-detecting element 44are formed. When stacking faults are enlarged by on-state forward biasoperation and the voltage in the forward direction is increased in thepn diode 43, the pn diode 43 is heated to a temperature of higher than350° C. while on-state forward bias operation is stopped and thetemperature of the pn diode 43 is measured by the temperature-detectingelement 44, and thereby stacking faults in the pn diode 43 are shrunkand the voltage in the forward direction is recovered.

In FIG. 7, on the same SiC single crystal substrate, a pn diode 51, aheater 52 and a temperature-detecting element 53 are formed. Whenstacking faults are enlarged by on-state forward bias operation and thevoltage in the forward direction is increased in the pn diode 51, the pndiode 51 is heated to a temperature of higher than 350° C. by the heater52 while on-state forward bias operation is stopped and the temperatureof the pn diode 51 is measured by the temperature-detecting element 53,and thereby stacking faults in the pn diode 51 are shrunk and thevoltage in the forward direction is recovered.

The embodiments of the present invention were described above, but thepresent invention should not be limited by the above embodiments, andvariations and modifications may occur without departing from the scopeof the present invention.

EXAMPLES

The present invention will be described with reference to the followingexamples below. Needless to say, the present invention should not belimited by the examples.

Example 1

A pn diode as shown in FIG. 2 was prepared for test. On an n type 4H-SiC(0001) substrate (carrier density of 8×10¹⁸ cm⁻³, 400 μm thick) preparedby slicing an ingot grown by the modified Lely method in an offdirection of [11-20] at an off angle of 8° and mirror treating thesurface, a nitrogen doped n type SiC layer (donor density of 5×10¹⁴cm⁻³, 40 μm thick), and an aluminum doped p type SiC layer (p typejunction layer: acceptor density of 5×10¹⁷ cm⁻³, 1.5 μm thick and p+type contact layer: acceptor density of 1×10¹⁸ cm⁻³, 0.5 μm thick) wereepitaxially grown in this order.

Next, the outer peripheral part of the epitaxial film was removed byreacting ion etching (RIE) and a mesa structure having a vertical widthof 4 μm was formed. In order to ease the electric field concentration inthe mesa bottom, aluminum ions were implanted to the mesa bottom andthereby a JTE having a total dose amount of 1.2×10¹³ cm⁻², a width of250 μm and a depth of 0.7 μm. After implantation of aluminum ions,aluminum ions were activated by annealing treatment in an argon gasatmosphere. Thereafter, a heat-oxidized film for protecting was formedon the element surface.

On the front and back surfaces of the resulting substrate, a cathodeelectrode and an anode electrode were deposited using an electron beamheat deposition device. The cathode electrode was formed by depositingNi (350 nm thick) on the backside surface of the substrate, and theanode electrode was formed by depositing a Ti film (100 nm thick) and anAl film (350 nm thick) in this order on the upper surface of the p+ typecontact layer. After the deposition of these electrodes, heat treatmentsfor the cathode electrode and the anode electrode were carried out at1050° C. for 90 sec and at 900° C. for 180 sec, respectively to form analloy with SiC and thereby an ohmic electrode was prepared.

Using the pn diode thus prepared, the following on-state forward biasoperation test was carried out. The cathode electrode of the pn diodewas adhered on a copper plate using a high melting point solder, andthen an aluminum wire was bonded on the anode electrode using anultrasonic bonding device. The copper plate and the aluminum wire areconnected to an electric current source and a voltmeter. While the pndiode was kept under a temperature condition of 350° C., a directcurrent of 100 A/cm² was passed in the forward direction for 60 min.Successively, heating was carried out at 350° C. for 1 hr. Thereafter,the voltage in the forward direction was measured. The results are shownin FIG. 3.

Example 2

Using the pn diode same as prepared in Example 1, an on-state forwardbias operation test was carried out in the same conditions as inExample 1. Successively, heating was carried out at 400° C. for 1 hr.Thereafter, the voltage in the forward direction was observed. Theresults are shown in FIG. 3.

Example 3

Using the pn diode same as prepared in Example 1, an on-state forwardbias operation test was carried out in the same conditions as inExample 1. Successively, heating was carried out at 500° C. for 1 hr.Thereafter, the voltage in the forward direction was observed. Theresults are shown in FIG. 3.

Example 4

Using the pn diode same as prepared in Example 1, an on-state forwardbias operation test was carried out in the same conditions as inExample 1. Successively, heating was carried out at 600° C. for 1 hr.Thereafter, the voltage in the forward direction was observed. Theresults are shown in FIG. 3.

Comparative Example 2

Using the pn diode same as prepared in Example 1, an on-state forwardbias operation test was carried out in the same conditions as inExample 1. Successively, heating was carried out at 300° C. for 1 hr.Thereafter, the voltage in the forward direction was observed. Theresults are shown in FIG. 3.

Comparative Example 2

Using the pn diode same as prepared in Example 1, an on-state forwardbias operation test was carried out in the same conditions as inExample 1. Successively, the voltage in the forward direction wasobserved without heating. The results are shown in FIG. 3. The voltagebefore the energizing test is also shown in FIG. 3.

Example 5

Using the pn diode same as prepared in Example 1, an on-state forwardbias operation test was carried out. Successively, the pn diode washeated at 350° C. for a prescribed time. Thereafter, thephotoluminescence image of the SiC epitaxial film after heating wasobserved. The results are shown in FIG. 4.

Example 6

Using the pn diode same as prepared in Example 1, an on-state forwardbias operation test was carried out. Successively, the pn diode washeated at 400° C. for a prescribed time. Thereafter, thephotoluminescence image of the SiC epitaxial film after heating wasobserved. The results are shown in FIG. 4.

Example 7

Using the pn diode same as prepared in Example 1, an on-state forwardbias operation test was carried out. Successively, the pn diode washeated at 500° C. for a prescribed time. Thereafter, thephotoluminescence image of the SiC epitaxial film after heating wasobserved. The results are shown in FIG. 4.

Example 8

Using the pn diode same as prepared in Example 1, an on-state forwardbias operation test was carried out. Successively, the pn diode washeated at 600° C. for a prescribed time. Thereafter, thephotoluminescence image of the SiC epitaxial film after heating wasobserved. The results are shown in FIG. 4.

Comparative Example 3

Using the pn diode same as prepared in Example 1, an on-state forwardbias operation test was carried out. Successively, the pn diode washeated at 300° C. for a prescribed time. Thereafter, thephotoluminescence image of the SiC epitaxial film after heating wasobserved. The results are shown in FIG. 4.

Comparative Example 4

Using the pn diode same as prepared in Example 1, an on-state forwardbias operation test was carried out. Successively, the photoluminescenceimage of the SiC epitaxial film was observed (heating was not carriedout). The results are shown in FIG. 4.

The invention claimed is:
 1. A method for recovering an on-state forwardvoltage in a bipolar semiconductor device such that electrons and holesare recombined in a silicon carbide epitaxial film grown on the surfaceof a silicon carbide single crystal substrate at the time of on-stateforward bias operation, the method comprising: increasing the on-stateforward voltage in the bipolar semiconductor device by an on-stateforward bias operation; and heating the bipolar semiconductor device ina condition of stopping the on-state forward bias operation at atemperature between 400° C. and 800° C.
 2. The method for recovering anon-state forward voltage in a bipolar semiconductor device according toclaim 1 wherein using a temperature-controlling device for heating thebipolar semiconductor device, the bipolar semiconductor device is heatedat a temperature between 400° C. and 800° C.
 3. The method forrecovering an on-state forward voltage in a bipolar semiconductor deviceaccording to claim 1 wherein the bipolar semiconductor device used inthe method comprises a hexagonal silicon carbide single crystalsubstrate such that a hexagonal silicon carbide epitaxial film is grownon the surface of the substrate.
 4. The method for recovering anon-state forward voltage in a bipolar semiconductor device according toclaim 3 wherein the bipolar semiconductor device used in the methodcomprises a 4H silicon carbide single crystal substrate such that a 4Hsilicon carbide epitaxial film is grown on the surface thereof, a 6Hsilicon carbide single crystal substrate such that a 6H silicon carbideepitaxial film is grown on the surface thereof, or a 2H silicon carbidesingle crystal substrate such that a 2H silicon carbide epitaxial filmis grown on the surface thereof.
 5. The method for recovering anon-state forward voltage in a bipolar semiconductor device according toclaim 1 wherein the bipolar semiconductor device used in the methodcomprises a 15R silicon carbide single crystal substrate such that a 15Rsilicon carbide epitaxial film is grown on the surface thereof.
 6. Amethod for shrinking stacking faults in a bipolar semiconductor devicesuch that electrons and holes are recombined in a silicon carbideepitaxial film grown on the surface of a silicon carbide single crystalsubstrate at the time of on-state forward bias operation, the methodcomprising: increasing the on-state forward voltage in the bipolarsemiconductor device by an on-state forward bias operation; and heatingthe bipolar semiconductor device in a condition of stopping the on-stateforward bias operation at a temperature between 400° C. and 800° C. 7.The method for shrinking stacking faults in a bipolar semiconductordevice according to claim 6 wherein using a temperature-controllingdevice for heating the bipolar semiconductor device, the bipolarsemiconductor device is heated at a temperature between 400° C. and 800°C.
 8. The method for shrinking stacking faults in a bipolarsemiconductor device according to claim 6 wherein the bipolarsemiconductor device used in the method comprises a hexagonal siliconcarbide single crystal substrate such that a hexagonal silicon carbideepitaxial film is grown on the surface of the substrate.
 9. The methodfor shrinking stacking faults in a bipolar semiconductor deviceaccording to claim 8 wherein the bipolar semiconductor device used inthe method comprises a 4H silicon carbide single crystal substrate suchthat a 4H silicon carbide epitaxial film is grown on the surfacethereof, a 6H silicon carbide single crystal substrate such that a 6Hsilicon carbide epitaxial film is grown on the surface thereof, or a 2Hsilicon carbide single crystal substrate such that a 2H silicon carbideepitaxial film is grown on the surface thereof.
 10. The method forshrinking stacking faults in a bipolar semiconductor device according toclaim 6 wherein the bipolar semiconductor device used in the methodcomprises a 15R silicon carbide single crystal substrate such that a 15Rsilicon carbide epitaxial film is grown on the surface thereof.